1. Field of the Invention:
This invention relates to a current mirror circuit with a large input/output current ratio, and more particularly, to a circuit configuration of the current mirror circuit suitable to be formed in a semiconductor integrated circuit.
2. Description of the Prior Art:
Since transistors of the same characteristics can be easily combined in the semiconductor integrated circuit, the transistors of the same characteristics are used to provide a current mirror circuit having a strictly controlled input/output current ratio. The input/output current ratio may be controlled by emitter areas of the transistors used in the current mirror circuit.
Such a conventional current mirror circuit is shown in FIG. 1. There are used two NPN transistors 1 and 2 which have an emitter area ratio of 1:N. The emitters of these transistors 1 and 2 are grounded together. The bases of both transistors 1 and 2 are commonly connected to each other. The collector of the transistor 1 is connected to the common joint of the bases to operate as a diode. The collector/base short-circuited point of the transistor 1 is connected to an input terminal 3, and the collector of the transistor 2 is connected to an output terminal 4.
The transistors 1 and 2 are formed on a single semiconductor chip through the same diffusion process and have the same parameters other than the planar area. More specifically, the base, collector and emitter regions of the transistors 1 and 2 have the same values in their parameters such as a depth, impurity density, etc. From this reason, the current densities of the transistors 1 and 2 become equal to each other. Therefore, the currents flowing through the transistors 1 and 2 have a proportional relationship with the emitter areas thereof as represented by the following equation: EQU I.sub.2 /I.sub.1 =A.sub.E2 /AE.sub.1 =N (1)
where
I.sub.1 : current flowing through the transistor 1 PA1 I.sub.2 : current f1owing through the transistor 2 PA1 A.sub.E1 : emitter area of the transistor 1 PA1 A.sub.E2 : emitter area of the transistor 2 PA1 N: emitter area ratio between the transistors 1 and 2. PA1 I.sub.OUT : output current taken out from the output terminal 14 PA1 I.sub.11 : current flowing through the transistor 11 PA1 I.sub.15 : current flowing through the transistor 15 PA1 I.sub.16 : current flowing through the transistor 16 PA1 I.sub.IN : input current flowing into the input terminal 13
In this way, an output current proportional to an input current can be obtained. By setting the value of a proportional constant N, i.e. the emitter area ratio, in the equation (1) larger than 1, a current mirror circuit can be also realized which produces a larger output current than an input current.
However, when taking out an output current 100 times larger than an input current for example, the circuit of FIG. 1 requires to broaden the emitter area of the transistor 2 about 100 times larger than that of the transistor 1. This results in such a defect that the area of the transistor 2 becomes very large and the area of a chip necessary for the semiconductor integrated circuit is increased accordingly with an adverse effect of the higher manufacturing cost. Moreover, since the broadened area of the transistor 2 causes a temperature gradient within its emitter area, the transistors 1 and 2 lose the coincidence in their electrical characteristics, whereby it becomes impossible to obtain an output current stably proportional to an input current.
The current mirror circuit of FIG. 1 can also provide an output current smaller than an input current at a predetermined ratio. In this case, the proportional constant N in the equation (1) is set below one. However, when taking out an output current reduced at a very small value, for example 1/50, the emitter area of the transistor 2 must be made very small. But, too small sized transistor is sensitive to fluctuation of manufacturing condition. Therefore, to obtain controlled characteristics there is a limitation on the minimum size of transistors arrayed in the semiconductor integrated circuit. From this reason, when the emitter area of the transistor 2 is set at the minimum limit size, the transistor 1 requires the very large emitter area. This causes a similar defect to that in the above case where an output current is made very large.
A current mirror circuit adapted to make small an output current as shown in FIG. 2 has been proposed in Japanese Patent Application Un-Examined Publication No. 57-723. In this circuit, the emitter of a transistor 11 whose base and collector are connected to form a diode and the emitter of a transistor 12 are commonly connected to the joint between the collector and the base of a transistor 15 which is also connected to form a diode. The base of a transistor 16 is connected to the common joint between the collector and the base of the transistor 15. The base of the transistor 12 is connected to the common joint between the collector and the base of the transistor 11. An input terminal 13 is connected to the collectors of the transistors 11 and 16, while an output terminal 14 is connected to the collector of the transistor 12. The emitters of the transistors 15 and 16 are commonly grounded together.
Since the conventional circuit shown in FIG. 2 is fabricated in a semiconductor integrated circuit similarly to that shown in FIG. 1, the transistors 11 and 12 are matching with each other in the point of electrical characteristics, and likewise the transistors 15 and 16 are matching with each other in the point of electrical characteristics. Assuming now that the ratio of emitter area of the transistor 11 to emitter area of the transistor 12 is K and the ratio of emitter area of the transistor 16 to emitter area of the transistor 15 is L, the relationship of currents passing through the respective transistors 11, 12, 15 and 16 are represented as follows: EQU I.sub.OUT /I.sub.11 =1/K (2) EQU I.sub.15 =I.sub.OUT +I.sub.11 =(1+K)I.sub.OUT ( 3) EQU I.sub.16 =L.multidot.L.sub.15 =(L+L.multidot.K)I.sub.OUT ( 4) EQU I.sub.IN =I.sub.11 +I.sub.16 =(K+L+L.multidot.K)I.sub.OUT ( 5) EQU I.sub.OUT /I.sub.IN =1/k+L+L.multidot.K (6)
where
Thus, the current mirror circuit shown in FIG. 2 and fabricated in a semiconductor integrated circuit permits to take out an output current I.sub.OUT reduced proportional to the ratio of 1/(K+L+L.K) relative to an input current I.sub.IN flowing into the input terminal 13. Further, the circuit of FIG. 2 requires the much smaller area for the transistors 11, 12, 15 and 16 as compared with the current mirror circuit shown in FIG. 1, so that the foregoing defect in the prior art is improved to a certain extent.
However, there were accompanied with such a defect as follows, because the emitter of the transistor 12 is not directly grounded, but grounded through the transistor 15.
That is, in the conventional circuit as shown in FIG. 1, the emitter of the transistor 2 is directly grounded, whereby the circuit can operate normally with the voltage applied to the output terminal 4 above ca. 0.3 V. To the contrary, the conventional circuit as shown in FIG. 2 can not operate normally unless the voltage applied to the output terminal 14 exceeds 1.0 V. In other words, a load which lowers the voltage at the output terminal 14 below 1.0 V cannot be connected to the output terminal 14. Thus, loads applicable to the current mirror circuit as shown in FIG. 2 are limited.